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    Job Description:

    辽宁快乐12开奖结果 www.pjb7.com Work with technical marketing to define SoC product for AI/computer system;

    Write the SoC architecture and requirement specs;

    Conduct high level modeling and simulations;

    Work with project lead to conduct feasibility analysis, define design strategy and planning;

    Keep up to date with latest SoC for AI and computer system.

    Qualification:

    Master or Ph.D degree with 10+ year of experience in SoC architecture design;

    Proven track record of SoC architecture definition and product design;

    Familiar with RISC architecture, on chip bus protocols, memory and coherency;

    Familiar with SoC I/O interface controller/PHY such as DDR/PCIe/USB/AV interfaces;

    Solid background in CPU architectures and operations with specialty in memory/cache control and management;

    Familiar with System Verilog and/or System C;

    Positive mindset, self-driven and good team player;

    Excellent written and oral communication skills in both Chinese and English.


    HR Contact:

    Job Description:

    Work with SoC architect to define SoC high level and micro architecture specs;

    Conduct technical feasibility analysis and design effort estimate;

    Work out product development planning with analog design lead and tracking/reporting project execution;

    Lead the project team and oversee SoC design, implementation, DFT, P&R, STA and verification;

    Support application engineering and product engineering team for system test/validation and chip characterizations and qualification.

    Qualification:

    MSEE or Ph.D with minimum 10+ years of experience in SoC design experience;

    Project lead experience with successful tape out in 28nm/16nm and advanced technologies;

    Hands on experience in SoC design practice and methodology (Architecture, logic design, verification, DFX);

    Familiar with RISC architecture and bus protocols such as AXI, memory;

    Deep knowledge in DDR/PCIe/USB/DP interface protocol;

    Solid background in high-speed/low power SoC design techniques(synchronous/asynchronous design);

    Good insight in the physical implementation issues (timing, OCV, xtalk, IR drop, package);

    Experience in UVM and large-scale emulator system (Veloce and/or Palladium);

    Highly organized in project management, documentation and reporting;

    Proactive and open minded;

    Lead by example.


    HR Contact:

    Job Description:

    RD on algorithms related to computer vision and deep learning;

    Support RTL implementation;

    Qualification:

    MS in Computer Science, Electrical, or Applied Mathematics;

    Experience in computer vision, deep learning and optimization methods;

    Familiar with basic algorithms on objective detection, recognition, tracking, etc.;

    At least familiar with one deep learning framework;

    Excellent programming expertise (python, matlab and c/c++) required;

    Self-motivated, good team work spirit and good communication skills;

    Familiar with Cuda/opencv is a plus.


    HR Contact:

    Job Description:

    RTL coding;

    Function simulation in module level and system level;

    Making system design and verification plan;

    FPGA implementation with various IP;

    FPGA debugging.

    Qualification:

    Excellent team working style;

    Good at Verilog/Systemverilog coding;

    Good at FPGA development;

    Good skill in English reading and writing;

    Familiarity with C programming is a plus;

    Familiarity with python programming is a plus.


    HR Contact:

    Job Description:

    Support RD Linux/UNIX network/OS/hardware;

    Provide Perl/SKILLl/TCL script support and develop necessary scripts or tools for IC designers;

    Support EDA tool and EDA design flow, especially digital front end flow (DC/PT/FM/DFT/Incisive/VCS/Conformal/Tessent etc.);

    Support timing characterization flow for stand cell/IO/memory/analog IP;

    Qualification:

    BSEE with minimum 3 years of experience;

    Familiar with EDA design flow for mixed-signal design;

    Familiar with UNIX/Linux Operating system, VNC, Exceed;

    Familiar with Computer languages such as C, C++, Perl/TCL/C-shell;

    Familiar with version control tools like DesignSync, CVS, SVN, etc.;

    LSF or SGE experience is a plus;

    Good communication skills.


    HR Contact:

    Job Description:

    RD on algorithms related to computer vision and deep learning;

    Support RTL implementation;

    Qualification:

    MS in Computer Science, Electrical, or Applied Mathematics;

    Experience in computer vision, deep learning and optimization methods;

    Familiar with basic algorithms on objective detection, recognition, tracking, etc.;

    At least familiar with one deep learning framework;

    Excellent programming expertise (python, matlab and c/c++) required;

    Self-motivated, good team work spirit and good communication skills;

    Familiar with Cuda/opencv is a plus.


    HR Contact:

    Job Description:

    Develop the desktop application for Linux and Windows;

    Develop the software to emulate the hardware behavior.

    Qualification:

    BSEE with 3+ years or MSEE with 1+ years of working experience in software development;

    Excellent team working style;

    Good at C programming;

    Good at python programming;

    Good at desktop application development;

    Good skill in English reading and writing;

    Familiarity with computer vision programming such as OpenCV is a plus;

    Familiarity with Machine Learning frameworks such as Tensorflow, Keras, Pytorch is a plus.


    HR Contact: .pjb7.com

    Job Description:

    RTL coding;

    Function simulation in module level and system level;

    Making system design and verification plan;

    FPGA implementation with various IP;

    FPGA debugging.

    Qualification:

    BSEE with 3+ years or MSEE with 1+ years of working experience in digital IC design or FPGA development;

    Excellent team work style;

    Good at Verilog/Systemverilog coding;

    Good at FPGA development;

    Good skill in English reading and writing;

    Familiarity with C programming is a plus;

    Familiarity with python programming is a plus.


    HR Contact:

    Job Description:

    Participate ASIC digital verification for various PCIe IP/SoC projects;

    Create PCIe verification plans with designers;

    Develop DV architecture and verification environment;

    Verification execution and sign-off.

    Qualification:

    Excellent team work style;

    Production experience in PCIe Gen 3 products;

    Solid IP/SoC verification background;

    Mass production for verified IP/SoC;

    Bachelor with 7+ years of experience in ASIC digital verification (Master with 5+ years );

    Expert in System Verilog/UVM;

    Expert in scripting;

    Good English skills (read and write);

    Skills plus:

    Production experience in simulation acceleration solution;Production experience in in-circuit emulation solution;Familiar with x86 architecture;Good understanding on modern Operating systems and virtualization for PCIe.
    HR Contact:

    Job Description:

    Development of next generation solutions for advanced memory interfaces of data centers;

    High speed SI simulation and analysis;

    Extraction of channel model using standard industry tools;

    Lab measurements of interconnect channel in frequency and time domains.

    Qualification:

    MS in Electrical Engineering/Microwave/Physics/Computer Science/Math;

    Knowledge of Electromagnetic and Microwave concepts;

    Knowledge of a programming or scripting language in a Windows/UNIX environment;

    Strong analytical and problem-solving skills;

    Passion for technology;

    Eager, quick learner with strong team-work spirit;

    Excellent technical communication skills.


    HR Contact:

    Showing 1 - 10 of 38 Page: 1234 Next:10
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  • 深海鱼选食草的 教你几招聪明吃海鲜 2019-03-15
  • [大笑]那是你认的远祖也,跟咱没关系! 2019-03-15
  • 河北沧州经济开发区管理委员会 2019-02-27
  • 江干区结对帮扶西藏那曲教育玩转“一对一”“多对一” 2019-02-27